Description
Due to a problem in the Quartus® II software version 13.1 and later, you may get the following error when compiling a Verilog HDL file that has converted from a Block Design File (.bdf).
The cause of the error is due to the generated Verilog HDL file has a extra comma in the port connections.
Resolution
To workaround the error, manually delete the extra comma in the <Verilog_file>.v(line_number).
This problem is schedule to be fixed in future release of the Quartus II software.