Device Family: Arria® V GT, Arria® V GX

Type: Answers

Area: EMIF, Intellectual Property


IP Product: Other

Is there an issue after hard memory controller design without specific INI file being programmed on Arria V ES device ?

Description

Design using Arria V ES with hard memory controller compiles fine in quartus and you can program the board successfully. However the design will have problem to work properly on board. 

Workaround/Fix

Create a quartus.ini file that include the below settings in the INI file. This quartus.ini file should be save in the quartus project directory.

PGM_CONFIG_IO_A5 = ON
PGM_A5ES_IOCSR_RECONFIG=ON