Article ID: 000082579 Content Type: Troubleshooting Last Reviewed: 09/11/2012

In FIFO less mode of Triple-Speed Ethernet (IP), does the TSE IP discard erroneous frames when the RX_ERR_DISC bit in the command_config register is set to 1?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

No. Triple-Speed Ethernet (TSE)  IP does not discard any erroneous frames even when both RX_ERR_DISC is set to 1 and rx_section_full is set to 0 for store and forward mode.

To discard erroneous frames, Internal FIFO is necessary and the TSE IP must behave as store&forward mode with setting the rx_section_full to zero.

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Intel® Programmable Devices

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