Type: Answers

Area: Intellectual Property

IP Product: Triple Speed Ethernet MAC

When I configure the Triple-Speed Ethernet IP as FIFOless mode, how can I apply synchronous reset on the RX user logic?


If you want to apply synchronous reset on the RX user logic, follow the steps below:


1.       Assert reset signals of Triple-Speed Ethernet (TSE) IP and RX user logic at the same time.


2.       De-assert reset signal of TSE IP first.


 3.       Once clock detection circuit detects that clock signal from mac_rx_clk_0 begins to toggle, de-assert resets signal of RX user logic a few clocks later.