When you run the pin_assignments.tcl file for DDR3L SDRAM UniPHY based controller design in the Quartus® II software version 11.0sp1 and 11.1, you will see the following assignments are missing:
address and command signals do not have output termination assignments.
memory clock outputs are assigned "Series 40 ohm with Calibration" instead of "without Calibration".
address and command signals are using the wrong termination control block
This is a known issue in the Quartus II software version 11.1 and 11.0SP1.