Device Family: Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX, Arria® V GT, Arria® V GX, Arria® V GZ, Arria® V ST, Arria® V SX, Cyclone® V GX, Cyclone® V SE, Cyclone® V ST, Cyclone® V SX, Stratix® V E, Stratix® V GS, Stratix® V GT, Stratix® V GX

Type: Answers

Area: Intellectual Property


IP Product: PCI Express 1/2/4/8 Lanes (x8)

Why are some of the Rx Buffer Credit Allocations missing on the Avalon-MM Hard IP for PCI Express?

Description

The Altera® Avalon®-MM Hard IP for PCI Express® User Guides show 5 possible Rx Buffer Credit Allocations:

Minimum, Low, Balanced, High and Maximum

However, for Arria® 10 and Stratix® V devices in the Quartus® II software release v14.0, the High and Maximum settings do not appear for the Avalon-MM variants.  The possible allocations for those devices are:

Minimum, Low, Balanced

Workaround/Fix

Altera found performance issues with the High and Maximum settings in the Avalon-MM variants, so those settings have been removed for Arria®10 and Stratix® V devices in the Quartus II software version 14.0.

Note these same parameters are scheduled to be removed for Avalon-MM variants in Arria V and Cyclone® V devices in a future software release.

This change will be reflected in a future version of the user guides.