Device Family: Arria® V, Arria® V GT, Arria® V GX, Arria® V GZ, Arria® V SX, Cyclone® V, Cyclone® V GT, Cyclone® V GX, Cyclone® V ST, Cyclone® V SX, Stratix® V, Stratix® V GS, Stratix® V GT, Stratix® V GX
Area: Component, HSIO
Stratix® V, Arria® V, and Cyclone® V devices support placing an incoming dedicated transceiver reference clock on dual-use GXB_RX / GXB_REFCLK input pins. However, this functionality was not enabled until Quartus® II software version 12.1. Prior to Quartus II v12.1 reference clocks could only be placed on the dedicated REFCLK input pins.
This functionality has been fully implemented as of Quartus II v12.1.