Article ID: 000081573 Content Type: Product Information & Documentation Last Reviewed: 05/10/2013

How do I resolve hold failures on the altera_reserved_tck clock domain?

Environment

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Description

Hold failures on the altera_reserved_tck clock domain may be caused by large clock skew. To reduce clock skew, consider using global or regional clock routing resources for this clock. For details, see the section on Global Routing Resources in the Area and Timing Optimization (PDF) chapter of the Quartus II Handbook.

Resolution

 

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Intel® Programmable Devices