Device Family: Intel® Arria® 10, Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX

Type: Answers

Area: EMIF, Intellectual Property

IP Product: A10 FPGA dev kit on revE1 board + production silicon

Why do I see failures when implementing multiple external memory interfaces in Arria 10 devices?


When multiple memory interfaces are implemented in the same I/O column with the EMIF Debug Toolkit option disabled, you may see calibration or memory test failures due to data corruption during calibration. Memory test failures may occur even if calibration passes.

This issue affects all memory interface protocols & all combinations of protocols that share an I/O column.

Implementations with a single memory interface in an I/O column are not affected, and designs will pass.

This issue affects designs using Arria® 10 devices (ES, ES2, Production) and the Quartus® II software versions 15.0.2 and earlier.


Choose one of the following workarounds.

1) Enable the EMIF Debug Toolkit option and daisy-chain the interfaces. Then regenerate the EMIF IPs.


2) Install Patch 2.08 over Quartus II software version 15.0.2 and regenerate the EMIF IPs. If you are using an earlier Quartus II version, you will need to install version 15.0.2 prior to installing Patch 2.08.

This issue will be fixed in a future version of the Quartus II software.