Type: Answers

Area: EMIF, Intellectual Property


IP Product: QDRII+ SRAM Controller with UniPHY

Cannot find PLL settings that allow for truncation-free problems in TimeQuest

Description

You may see this error in the MegaWizard message window in Quartus® II 12.0SP2 when generating Altera® UniPHY external memory interface IP with clock definitions which result in non integer values of clock period in ps.  The memory IP performs the following check:

set period_ps [expr10^6/]
if ([expr int(*2)] == [expr int()*2])

If this is not true then the error will be reported in the MegaWizard message window.  For example where a 375MHz clock is used, int(*2) is 5333ps but int()*2 is 5334ps.

Workaround/Fix

Select a PLL reference clock frequency that results in a clock with a period which is an integer number of ps.

This issue has been fixed in Quartus II 12.1