Device Family: Arria® V GT

Device Family: Arria® V GX

Device Family: Arria® V GZ

Type: Answers

Area: EMIF

Area: Intellectual Property

IP Product: Arria V GX Starter Development Kit

Why am I seeing a difference in the option of number of chip selects for DDR3 UniPHY IP generated in Quartus II V12.0 and V13.0 and later versions?


The behaviour of DDR3 IP generated in QII V12.0 is incorrect. The number of chip select option for DDR3 UniPHY controller is limited to 2 for both Arria V and Cyclone V device.


This issue has been fixed in QII V13.0