Device Family: Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX, Arria® V GT, Arria® V GX, Arria® V GZ, Arria® V ST, Arria® V SX, Cyclone® V GT, Cyclone® V GX, Cyclone® V SE, Cyclone® V ST, Cyclone® V SX, Stratix® V GS, Stratix® V GT, Stratix® V GX

Type: Answers

Area: Intellectual Property


IP Product: PCI Express 1/2/4/8 Lanes (x8)

RX buffer credit allocation - performance for received requests" (rxbuffer_rxreq_hwtcl) " is out of range: "Minimum", "Low", "Balanced"

Description

This error message is displayed when opening a Quartus® II v13.1.4 Qsys system in Quartus II v14.0 or later, if the system has an Altera® Avalon®-MM Hard IP for PCI Express® with High or Maximum RX Buffer Credit Allocation chosen.

In addition, when parameterizing the Avalon-MM Hard IP for PCI Express in Quartus II v14.0 or later, the High and Maximum settings for the Rx Buffer Credit Allocation are not available.

Workaround/Fix

Altera found performance issues with the High and Maximum settings in the Avalon-MM variants. Consequently, these settings have been removed for Arria® V GZ, Arria 10 and Stratix® V devices from Quartus II software version 14.0.

These same parameters are scheduled to be removed for Avalon-MM variants in Arria V and Cyclone® V devices in a future software release.

This change will be reflected in a future version of the user guides.