Device Family: Stratix® III

Type: Answers

Area: EMIF, Intellectual Property


IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY

Warning (307026): DDR3-SDRAM pin mem_dqs_to_and_from_the_uniphy_ddr3_0[0] must be fed by an OUTPUT_PHASE_ALIGNMENT WYSIWYG with either a 90, 72, 108, degree phase shift

Description

You may see this critical warning when running a full compilation of DDR3 UniPHY-based controller with the Stratix® III device.

Workaround/Fix

The phase setting for the output phase alignment block is always calibrated dynamically. So, this warning can be safely ignored.