Device Family: Stratix® II, Stratix® II GX

Type: Answers

Area: Component, EMIF

IP Product: QDRII SRAM Controller

How can I make parallel On Chip Termination assignment to the CQ and CQn bi-directional pins of the Legacy QDRII SRAM Controller in Stratix II devices?


In Stratix® II device legacy QDRII SRAM Controller, CQ pins are coded as bi-directional pins. Parallel On Chip Termination (OCT) is not supported by bi-directional pins in Stratix II devices.

To assign parallel OCT to the CQ and CQn pins, you will need to change the CQ and CQn stratixii_io WYSIWYGs in the datapath to have operation_mode set to "input" instead of bidir, and delete any register-related, output-related, and oe-related parameters (like ddio_mode, output_register_mode, oe_register_mode, etc). You should be able to find them in the HDL file <variation_name>_auk_qdrii_sram_cq_cqn_group.v/.vhd named "cq_inst" and "cqn_inst".

Once you make the pin input instead of bi-directional, you will be able to assign parallel OCT to it.

You will have to make the above mentioned changes to the code everytime you regenerate the core.