Article ID: 000075145 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does rx_analogreset input from FPGA fabric not have an effect on rx_freqlocked and rx_pll_locked signals in a Basic (PMA-Direct) channel implemented in CMU channel of the Stratix IV GX/GT or Hardcopy IV GX/GT devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Rx_analogreset is not working properly when a Basic (PMA-Direct) channel is implemented in CMU channel of a Stratix® IV GX/GT or Hardcopy® IV GX/GT devices.  This is due to a bug in Quartus®  II 9.1 software.  You may not see correct 'rx_pll_locked' and 'rx_freqlocked' behavior, as they do not respond to the rx_analogreset signal.  The workaround is to use Quartus II 10.0 software. Regenerate ALTGX and ALTGX_RECONFIG Megawizard™ files, and recompile the design.

Related Products

This article applies to 3 products

Stratix® IV GX FPGA
Stratix® IV GT FPGA
HardCopy™ IV GX ASIC Devices

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.