You may get this error if you have DDR SDRAM Controller ALTMEMPHY, DDR2 SDRAM Controller ALTMEMPHY or DDR3 SDRAM Controller ALTMEMPHY with controller setting set to High Performance Controller II in your SOPC Builder or Qsys design in Quartus® II software version 11.0.
For SOPC Builder design, manually include the .qip file of IP i.e. <DDR_SDRAM>.qip file to your project.
For Qsys design, you need to include the .qip file of Qsys project i.e. <qsys_project>.qip to your project.
This issue will be fixed in a future version of the Quartus II software.