The single bit error count (SBE_COUNT) field within the High Performance Controller (HPC) II Configuration and Status Register (CSR) may show counts that are higher than expected when using ECC with auto-correction enabled.
When the auto-correction feature is enabled by either setting the Controller Register Map ENABLE_AUTO_CORR bit to '1' or by having previously selected the Enable Auto Error Correction parameter option in the IP Controller Settings tab, the HPC II will perform a read-modify-write (RMW) to correct any error that is detected when reading. The read part of this RMW cycle will also increment the SBE_COUNT if an error is detected.
There is more information on the operation of auto-correction in the ECC section of the Functional Description - HPC II Controller (PDF)