Due to a problem in the Quartus® II software version 12.0, you may see this warning when generating IBIS models for Stratix® V and Arria® V devices. This warning may occur if the following conditions are true:
- The design contains bidirectional pins with calibrated parallel on-chip termination (OCT) enabled
Due to this problem, the EDA Netlist Writer adds the calibrated parallel OCT naming convention to the names of the generated IBIS models on bidirectional pins. This longer name exceeds the character limit allowed by the IBIS specification through version 4.1. Additionally, the output model is corrupt and does not pass the IBIS syntax check. The simulation results are not correct when using affected models.
Altera does not support bidirectional models with parallel OCT. Affected models have either of the following strings in their name:
Altera supports only input models with parallel OCT. Correct models have one of the following strings in their name: