Article ID: 000080587 Content Type: Troubleshooting Last Reviewed: 08/02/2023

Why does Quartus® II software version 15.0 and earlier allow an unsupported registered phase compensation FIFO setting for channels 1 and 2 of Arria® V device transceiver banks GXB_L0 and GXB_R0?

Environment

  • Quartus® II Subscription Edition
  • Arria® V Transceiver Native PHY Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® II software version 15.0 and earlier, the Quartus® II software fitter allows an unsupported registered phase compensation FIFO setting for channels 1 and 2 of Arria® V device transceiver banks GXB_L0 and GXB_R0.

    The restriction in the Arria® V device handbook is correct. There is no support for registered phase compensation FIFO mode in channels 1 and 2 of GXB_L0 and GXB_R0.

    Resolution

    You should not use the phase compensation FIFO in registered mode for the above channels.

    This problem has already been fixed in the Intel® Quartus® Standard software version 16.0.1.

    Related Products

    This article applies to 2 products

    Arria® FPGAs
    Arria® V GX FPGA