Device Family: Arria® V GZ

Device Family: Stratix® V E

Device Family: Stratix® V GS

Device Family: Stratix® V GT

Device Family: Stratix® V GX

Type: Answers

Area: EMIF

Area: Intellectual Property

IP Product: Other

Error (181011): Incompatible on-chip termination settings detected for pins in the DQS group fed by DQS I/O pin "<QK clock pin>". All pins in group must use the same OCT control block.


Due to a problem in the Quartus® II software, this error may appear when instantiating multiple RLDRAM 3 UniPHY interfaces in the design. Quartus II software assigns the incorrect on-chip termination (OCT) block for the the interface.

To verify this issue, in the Compilation Report, go to Fitter > Resource Section > Input pins and scroll to the row with the QK clock. Scroll to the right and verify to which OCT control block the pin is assigned.


The workaround for this error is assigning the correct OCT block with the following QSF assignment:

set_instance_assignment -name TERMINATION_CONTROL_BLOCK "<termination control block>" -to <QK pin name>

Ensure that all other signals that require termination control blocks have similar QSF assignments.

This issue is scheduled to be fixed in a future version of the Quartus II software.