Article ID: 000074207 Content Type: Product Information & Documentation Last Reviewed: 11/19/2013

How do I disable Pre-CDR or Post-CDR Reverse Serial Loopback on Stratix V, Arria V, and Cyclone V transceiver devices?

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Description

Pre-CDR or Post-CDR  Reverse Serial Loopback can be disabled on Stratix® V, Arria® V, and Cyclone® V transceiver devices by writing a 0 to either the Pre-CDR or Post-CDR Reverse Serial Loopback PMA Offset registers.

Related Products

This article applies to 12 products

Stratix® V GX FPGA
Cyclone® V SX SoC FPGA
Stratix® V FPGAs
Cyclone® V GT FPGA
Stratix® V GT FPGA
Cyclone® V GX FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Arria® V ST SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V GX FPGA

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