Article ID: 000076203 Content Type: Product Information & Documentation Last Reviewed: 08/15/2023

How do I calculate the ECC for DDR3 UniPHY-based controller?

Environment

  • Quartus® II Software
  • DDR3 SDRAM Controller with UniPHY Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    How do I calculate the ECC for DDR3 UniPHY-based controller?

    Resolution

    The error correction code (ECC) calculation for UniPHY-based memory controllers is based on the Hamming Coding scheme. The Hamming Coding scheme derives the parity bits and appends them to the original data to produce the output code word. The number of parity bits appended depends on the width of the data.

    For more information, refer to the ALTECC_ENCODER and ALTECC_DECODER megafunctions in the Integer Arithmetic Megafunctions User Guide.

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