Device Family: Arria® V, Arria® V GT, Arria® V GX, Arria® V ST, Arria® V SX

Type: Answers

Area: EMIF, Intellectual Property

IP Product: Renewal QDRII / II+ Controller with UniPHY

Why is my Arria V QDR II and QDRII+ SRAM controller with UniPHY IP missing a CQn clock signal ?


The Arria® V architecture does not support a complementary CQ clock. Instead, both edges of the CQ clock are used to capture the read data.