It is due to the reason that the clock synchronizer for transceiver was added into the transceivers powerdown input, causing the powerdown input for each TSE transceiver block undriven by the same powerdown input source.The following patch provides a solution to ensure power down signals into each IP TSE transceiver block is common.
Please download the appropriate Quartus® II software version 10.1SP1 patch 1.77 from the following links:
You must either have previously installed the Quartus II 10.1 SP1 software or must install the Quartus II 10.1 SP1 software before installing this patch. Otherwise, the patch will not be installed correctly and the Quartus II software will not run properly.
After you install the patch, regenerate your Triple Speed Ethernet MegaCore® before you compile your design.