Device Family: Arria® V GX, Cyclone® V GX

Type: Answers

Area: Component, EMIF


IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY

What is the default Local-to-Memory address mapping in the HPS SDRAM controller?

Description

By default, the Local-to-Memory Address Mapping option when using the HPS SDRAM controller is CHIP-ROW-BANK-COL. This is the Bank Interleave Without Chip Select Interleave option described in Chapter 4  Functional Description - HPS Memory Controller of the EMIF handbook.

Workaround/Fix

This mapping option is planned to be enhanced in a future version of the Quartus® II software.