Device Family: Intel® Arria® 10, Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX

Type: Answers

Area: EMIF, Intellectual Property

IP Product: DDR4 Hilo Daughter Card

Simulation stalls when global_reset_n is toggled early in Arria 10 DDR4 PHY-Only IP simulation


When performing a functional simulation with Arria® 10 DDR4 PHY-Only IP, toggling the global_reset_n early in the simulation may stall the sequencer resulting in afi_cal_success or afi_cal_fail never asserting.

This is an issue with simulation only and does not affect the hardware function.


As a workaround, apply a global_reset_n pattern similar to that generated by the altera_avalon_reset_source block in the DDR4 simulation example design.