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Type: Answers

Area: Intellectual Property


IP Product: Triple Speed Ethernet with 1588 MegaCore

In Qsys why are the Triple Speed Ethernet IP core clock names not described in the User Guide?

Description

The Triple Speed Ethernet User Guide describes the clock names used in the MegaWizard® configuration.

 

Qsys uses the following clock names:

 

  1. control_port_clock_connection
  2. pcs_mac_tx_clock_connection
  3. pcs_mac_rx_clock_connection
  4. receive_clock_connection
  5. transmit_clock_connection

Workaround/Fix

The following Qsys clock names are equivalent to the MegaWizard clock names;

  1. control_port_clock_connection -> clk
  2. pcs_mac_tx_clock_connection -> tx_clk
  3. pcs_mac_rx_clock_connection -> rx_clk
  4. receive_clock_connection -> ff_rx_clk
  5. transmit_clock_connection -> ff_tx_clk