Type: Answers

Area: EMIF, Intellectual Property


IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY

How can I access the Hard Controller Register Map of the UniPHY-based hard memory controller?

Description

The Hard Controller Register Map is defined in the External Memory Interface Handbook, Volume 3, Chapter 6, Table 6-19. The address map shown here is incorrect. The correct address range starts from address 0x0100 which is the same as Soft Controller Register Map.

Workaround/Fix

The address map in the table will be fixed in a future release of the External Memory Interface Handbook