Device Family: Stratix® III, Stratix® IV E, Stratix® IV GT, Stratix® IV GX

Type: Answers

Area: EMIF, Intellectual Property

IP Product: DDR2 SDRAM Controller MegaCore supporting UniPHY

Critical Warning (176647): DLL atom "{instance_name}|altera_mem_if_dll_stratixiv:dll0|dll_wys_m" dll_wys_m" is using a clock period of "value 1" ns, which is outside the valid range for its configuration mode. When the delay buffer mode is "HIGH" and the delay chain length is "8", the valid range is from "value 2" ns to "value 3" ns.


You may see this critical warning message when implementing DDR2 SDRAM memory interface operating below 240MHz using Altera DDR2 SDRAM Controller with UniPHY IP.


This critical warning can be ignored for DDR2 SDRAM memory interface operating below 240MHz since this is considered a low frequency external memory interface design and the calibration process is able to compensate for the resulting discrepancy.

Note that the delay chain length and delay buffer mode values might vary in the warning message.