Device Family: Arria® V GT, Arria® V GX, Arria® V ST

Type: Answers

Area: EMIF, Intellectual Property


IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY

Why do I get 3 unconstrained clocks in TimeQuest for my DDR3 controller in Arria V devices?

Description

Due to a problem in the Quartus® II software version 12.0sp2 and later, three unconstrained clocks may appear in the TimeQuest Timing Analyzer when creating a DDR3 controller with UniPHY for Arria V ST, GX, and GT devices. The clock output pin names end with the following:

<hierarchy>|dqs_enable_ctrl~DFFEXTENDDQSENABLE

Workaround/Fix

These unconstrained clocks can safely be ignored. The warnings will be removed in a future version of the Quartus II software.