Device Family: Cyclone® V

Type: Answers, Errata

Area: EMIF, Intellectual Property



Timing Closure for Hard LPDDR2 Interfaces May Not be Robust in Cyclone V SoC Devices

Description

This problem affects LPDDR2 products.

Hard LPDDR2 interfaces targeting Cyclone V SoC devices may have difficulty achieving timing closure.

Workaround/Fix

There is no workaround for this issue.

This issue is fixed in release 13.1.