Device Family: Cyclone® V

Type: Answers, Errata

Area: EMIF, Intellectual Property

Possible Timing Failures for LPDDR2 Designs on Cyclone V -7 Speed Grade Devices


This problem affects LPDDR2 products.

LPDDR2 designs targeting Cyclone V -7 speed grade devices at 333 MHz may fail address and command timing analysis.


The workaround for this issue is to operate the design at a lower frequency (such as 300 MHz), or use a -6 speed grade Cyclone V device.

This issue will be fixed in a future release.