Type: Answers

Type: Errata

Area: Intellectual Property



Invalid ALT_LVDS False Path Constraints in Triple Speed Ethernet Timing Constraint File

Description

The Triple Speed Ethernet SDC timing constraint file has invalid ALT_LVDS_TX megafunction false path setting that cuts a time path from 10-bits data interface to the LVDS I/O serializer/deserializer (SERDES). The invalid constraints are caused by invalid asynchronous clock group setting in the Triple Speed Ethernet SDC timing constraint file for variants with the LVDS I/O embedded transceiver.

This issue causes data corruption on the LVDS transmit channel even if the TimeQuest Analyzer does not report any timing violation.

The constraints are found in ACDS versions 12.0, 12.0sp1, 12.0sp2, 12.1, and 12.1sp1, and affects all the device families with LVDS I/O.

Workaround/Fix

Apply the following steps:

  1. Create a back-up for the SDC constraint file, generated by the Triple Speed Ethernet MegaCore function. For example, <user_define_name>_constraints.sdc
  2. Download the appropriate SDC constraint files according to the Triple Speed Ethernet variant selected:
  3. 10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS, GXB transceiver, SGMII bridge enabled:

    mac_pcs_pma_gxb_sgmii.sdc

    10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS, GXB transceiver, SGMII bridge disabled:

    mac_pcs_pma_gxb.sdc

    10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS, LVDS transceiver, SGMII bridge enabled: mac_pcs_pma_lvds_sgmii.sdc

    10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS, LVDS transceiver, SGMII bridge disabled:

    mac_pcs_pma_lvds.sdc

    1000BASE-X/SGMII PCS, GXB transceiver, SGMII bridge enabled:

    pcs_pma_gxb_sgmii.sdc

    1000BASE-X/SGMII PCS, GXB transceiver, SGMII bridge disabled:

    pcs_pma_gxb.sdc

    1000BASE-X/SGMII PCS, LVDS transceiver, SGMII bridge enabled:

    pcs_pma_lvds_sgmii.sdc

    1000BASE-X/SGMII PCS, LVDS transceiver, SGMII bridge disabled:

    pcs_pma_lvds.sdc

  4. Edit the following parameters from the downloaded SDC constraints file:
  5. set IS_SOPC <Get this value from the original SDC constraint file from step 1>

    set VARIATION_NAME "<Get this value from the original SDC constraint file from step 1>"

    set DEVICE_FAMILY "<Get this value from the original SDC constraint file from step 1>"

  6. Edit the following parameters from the downloaded SDC constraints file:
  7. Rename the downloaded SDC constraint file to the same filename of the SDC constraint generated by the Triple Speed Ethernet MegaCore.

  8. Edit the following parameters from the downloaded SDC constraints file:
  9. Use the downloaded SDC constraint file in your Quartus project.

When you use this workaround, you may get the following warning message: "ignored set_false_path warning". Ignore the warning.

This issue will be fixed in the next release.