Type: Answers, Errata

Area: EMIF, Intellectual Property



Error May Occur in EMIF VHDL Simulation with Riviera-PRO

Description

This problem affects DDR2, DDR3, LPDDR2, QDR II, RLDRAM II, and RLDRAM 3 products.

If you are using Riviera-PRO version 2012.06 to simulate your external memory interface with the VHDL simulation flow, you might encounter the following error:

# ELAB2: Fatal Error: ELAB2_0103 Input and inout ports of type reg are not allowed in Verilog modules instantiated in VHDL. # KERNEL: Error: E8005 : Kernel process initialization failed. # VSIM: Error: Simulation initialization failed.

Workaround/Fix

The workaround for this issue is to upgrade to Riviera-PRO version 2012.10.

This issue will not be fixed.