Type: Answers, Errata

Area: EMIF, Intellectual Property

Error Occurs When Generating RLDRAM 3 IP Core With PLL Sharing and EMIF On-Chip Debug Toolkit


This problem affects RLDRAM 3 products.

The following error message may appear when you attempt to generate an RLDRAM 3 IP core with the Enable EMIF On-Chip Debug Toolkit option enabled and PLL Sharing Mode set to Slave:

Error: test: add_connection: No connection type for afi_clk.out_clk_1/seq_bridge.clk ...


The workaround for this issue is to generate the IP with the PLL Sharing Mode set to No Sharing, and make the connections to an external PLL manually.

This issue will be fixed in a future version.