Critical Issue
This problem affects QDR II, and RLDRAM II products.
For designs with x18 or x36 DQ groups, it is possible that the data pins do not require I/Os in all the DQ groups. When this happens, the prefitter does not duplicate the I/O clock divider atom into the DQ groups that do not contain an I/O. The I/O clock divider atoms in a DQ group must be connected in cascade; when an I/O clock divider atom is not present in one of the DQ groups, a hardware failure may occur.
After duplication, if the number of I/O clock dividers is less than the number of DQSLBs, the prefitter inserts the missing I/O clock divider atoms. These atoms do not have a fanout. The prefitter clusters the I/O clock divider atoms in the DQ group by traversing their fan-ins (DQS delay chain).
This issue has been fixed.