Device Family: Intel® Arria® 10

Device Family: Arria® V

Device Family: Cyclone® V

Device Family: Stratix® V

Type: Answers

Type: Errata

Area: Tools



VHDL simulation of IOPLL or fPLL IP core generates an error message regarding the PLL_CTR_RESYNC parameter

Description

When running a VHDL simulation of one the following phase-locked loop (PLL) IP cores, the simulator might generate an error:

  • Altera® I/O PLL (Altera IOPLL) IP core in Arria® 10 designs
  • Fractional PLL (fPLL) IP core in Stratix® V, Arria V, or Cyclone® V designs

The simulator issues an error message regarding the PLL_CTR_RESYNC parameter:

# The following component generic is not on the entity: # PLL_CTR_RESYNC

Workaround/Fix

To resolve the simulation error for Mentor Graphics® ModelSim® SE or Synopsys® VCS MX, perform the following tasks:

  1. Locate the <Quartus Prime software installation directory>/quartus/eda/sim_lib/altera_lnsim_components.vhd file.
  2. Open the file in a text editor.
  3. Delete the PLL_CTR_RESYNC parameter definition in the altera_pll module.

To resolve the simulation error for ModelSim AE, perform the following tasks:

  1. Locate the <Quartus software installation directory>/../modelsim_ae/altera/vhdl/src/altera_lnsim/altera_lnsim_components.vhd file.
  2. Open the file in a text editor.
  3. Delete the PLL_CTR_RESYNC parameter definition in the altera_pll module.
  4. Run the following command to recompile the file to the correct library.

    5. vcom -work altera_lnsim /../modelsim_ae/altera/vhdl/src/altera_lnsim/altera_lnsim_components.vhd

You must have installation privileges to update this file. If you do not have installation privileges, recompile the file locally by performing the following tasks:

  1. Run the cp /../modelsim_ae/altera/vhdl/src/altera_lnsim/altera_lnsim_components.vhd . command to copy the altera_lnsim_components.vhd file to your local simulation directory.
  2. Open the file in a text editor.
  3. Delete the PLL_CTR_RESYNC parameter definition in the altera_pll module.
  4. Run the vlib altera_lnsim command.
  5. Run the vmap altera_lnsim altera_lnsim command.
  6. Run the vcom -work altera_lnsim altera_lnsim_components.vhd command.
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