Device Family: Intel® Arria® 10

Type: Answers, Errata

Area: EMIF, Intellectual Property

Generate Example Design Button May Invoke a Qsys Error Message Under Certain Circumstances


When an Arria 10 EMIF IP is added to a Qsys system from the Qsys IP Catalog, activating the Generate Example Design button in the IP parameter editor may cause the following Qsys error message to appear: The example design cannot be generated when there are errors. The errors mentioned are system-level connectivity errors which are shown in the Qsys messages window; these errors are not related to the IP example design.


The workaround for this issue is to generate the example design by invoking the EMIF IP parameter editor from the Quartus IP Catalog.

This problem will be fixed in a future version.