Article ID: 000076010 Content Type: Troubleshooting Last Reviewed: 06/15/2015

For some MAX 10 device designs, the Fitter causes an abnormal exit during the Fitter stage when listen_to_nsleep_signal is set

Environment

  • Quartus® II Subscription Edition
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    Critical Issue

    Description

    In the Quartus II software version 15.0, a legality check issue in the Fitter causes an abnormal exit during the Fitter stage when the listen_to_nsleep_signal parameter is explicitly set to true but the nsleep port is not connected. This issue applies to designs targeting the MAX 10 ZB16/25/50 device only. The Quartus II software should generate a user error, but causes an abnormal exit instead.

    You might encounter the abnormal exit if you use an input buffer atom, or Altera's general-purpose I/O (GPIO) Lite to construct your IP.

    Resolution

    There is no workaround. This issue will be fixed in a future software release.

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs