This problem affects QDR-IV interfaces on Arria 10 devices.
The following I/O timing failures are likely to be reported:
- DK versus CK timing is likely to fail, because the current timing model assumes that DK/CK calibration is not performed, but in reality DK/CK calibration is performed.
- Write timing is likely to fail, because the current timing model is incorrect.
The two timing failures described above are false, and can be ignored.