Type: Answers

Type: Errata

Area: EMIF

Area: Intellectual Property

Possible Internal Error During Compilation for MAX 10 Devices


This problem affects external memory interface products on MAX 10 devices.

A partial pin placement assignment for DQS/DM pins may cause the following internal error in the fitter stage of compilation:

Internal Error: Sub-system: FCUDA, File: /quartus/fitter/fcuda/fcuda_zb_dq_placement_op.cpp, Line: 8303 m_placed_cell == io_cell

The assignment of partial pin locations is not recommended. The Quartus II software should have produced an error message instead of the internal error.


The workaround for this issue to avoid receiving the internal error, is to do one of the following:

  • Assign all DQ/DQS/DM pins from the same DQ_GROUP.
  • Assign only the DQS pin and allow the Quartus II software to place the remaining DQ/DM pins from the same DQ_GROUP.
  • Do not make manual pin assignments and allow the Quartus II software to place all EMIF pins.

This issue is fixed in version 15.0.