Article ID: 000083600 Content Type: Troubleshooting Last Reviewed: 02/05/2014

Triple Speed Ethernet with 1000BASE-X and SGMII PCS Designs Receive Wrong Number of Preamble Bytes

Environment

  • Quartus® II Subscription Edition
  • Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Triple Speed Ethernet designs using SGMII PCS and 1000BASE-X protocol will receive wrong number of preamble bytes.

    For 1000BASE-X protocol, the encoding of Idle periods /I2/ is constructed from 2 code groups: /K28.5/ character at even position and /D16.2/ at odd position.If gmii_tx_en of GMII assertion occurs at odd position, the transmit state machine is unable to immediately insert a Start-Of-Packet code group /S/ as the Idle character must be completed. Therefore, the /S/ character will be inserted after the /I2/ is completed. In this scenario, /D16.2/ of /I2/ is inserted in the place of the first byte of preamble field, and /S/ at the second byte of preamble field.During reception of this frame, the receive state machine will replace /S/ with a preamble byte. However, the first preamble byte of the original transmit GMII frame is not replaced with preamble byte (it was replaced with /D16.2/ character to complete the Idle sequence during transmit operation). This scenario results a single byte of preamble loss across the system.The IEEE 802.3-2008 specification explains this issue in clause 65.1.3.2.1:NOTE 1 - The 1000BASE-X PCS transmit function replaces the first octet of preamble with the /S/ code-group or it discards the first octet and replaces the second octet of preamble with the /S/ code-group. This decision is based upon the even or odd alignment of the PCS’s transmit state diagram (see Figure 36–5). The 1000BASE-X PCS receive function replaces the /S/ code-group with an octet of preamble. The third octet of preamble is the first octet passed through the 1000BASE-X PHY without modification.

    Related Products

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    Intel® Programmable Devices