Device Family: Cyclone® V

Type: Answers, Errata

Area: EMIF, Intellectual Property

ECC Enabled Automatically in Cyclone V SoC HPS Devices


This problem affects DDR2, DDR3, and LPDDR2 products.

For HPS hard memory controller interfaces in Cyclone V SoC HPS devices, if you create interface widths of 24 or 40, ECC is enabled automatically, but no message is displayed to state that ECC is enabled.


The workaround for this issue is simply to be aware that ECC is enabled automatically, with no message displayed.

This issue will be fixed in a future release.