This problem affects DDR2, DDR3, LPDDR2, RLDRAM II, RLDRAM 3, and QDR II products.
In version 13.0 and earlier, there exists a small possibility
that calibration may enter an endless loop and fail to complete,
following repeated assertions of
This is a very unlikely failure. A typical instance of this
failure is marked by a design which behaves normally until repeated
and becomes unresponsive thereafter. The EMIF Debug Toolkit cannot connect
to the unresponsive design. Reprogramming the SRAM Object File (.sof) restores
responsiveness to the design.
If you experience any of the following more common calibration failures, they are most likely not attributable to this issue:
- calibration never completes successfully
- calibration margins are small and calibration occasionally fails
- the design passes calibration but occasional data errors occur while running the design
- calibration is reported to have completed successfully, but the design doesnt work