Type: Answers

Type: Errata

Area: EMIF

Area: Intellectual Property



LPDDR2 GUI Mismatch for Mode Register 2

Description

This problem affects LPDDR2 products.

The user interface incorrectly indicates an available Mode Register 2 (MR2) setting of CAS Latency. In reality, the interface should show the available MR2 setting to be Read Latency.

Workaround/Fix

The workaround for this issue is to treat the CAS Latency setting in the user interface as Read Latency.

This issue will be fixed in a future release.