Device Family: Cyclone® V

Type: Answers, Errata

Area: EMIF, Intellectual Property, Tools



ECC Not Enabled in Cyclone V SoC HPS Devices

Description

This problem affects DDR2, DDR3, and LPDDR2 products.

For HPS hard memory controller interfaces in Cyclone V SoC HPS devices, interface widths of 24 (16 plus ECC) and 40 (32 plus ECC) are not supported, because the preloader generator does not enable ECC.

Workaround/Fix

The workaround for this issue is to use non-ECC interface widths of 8, 16, or 32.

This issue will be fixed in a future release.