When the Joint Test Action Group (JTAG) ISP Clock (TCK) is run at high frequencies (1 to 10 MHz), the time necessary to shift data and address information into the device becomes negligible compared to the programming pulse time for the memory cells.
When programming multiple devices in a JTAG chain, concurrent programming allows the programming pulses for each of the devices to be applied simultaneously. Thus, this concurrent programming allows programming times to be significantly reduced.
When the TCK is run at low frequencies (~100 kHz), the time necessary to shift data and address information into the device becomes dominant as compared to the programming pulse time for the memory cells. Thus at these lower frequencies, concurrent programming has negligible benefits.
Altera supports concurrent programming when using Serial Vector Format files (.svf), Jam files (.jam), and Jam Byte-Code files (.jbc). These file formats automatically use concurrent programming whenever more than one device, of the same family, is targeted.
For more information, refer to In-System Programmability Guidelines for MAX II Devices (PDF) and AN 100: In-System Programmability Guidelines (PDF).