Article ID: 000075514 Content Type: Troubleshooting Last Reviewed: 08/09/2023

Why do I observe UVM RAL error when simulating the JESD204B or JESD204C Intel® FPGA IP with VCS* MX software version Q-2020.03-SP2?

Environment

  • Intel® Quartus® Prime Pro Edition
  • JESD204B Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a compatibility problem, you may observe UVM RAL error when simulating the JESD204B or JESD204C Intel® FPGA IP from the Intel® Quartus® Prime Pro Edition Software version 21.1 with VCS* MX software version Q-2020.03-SP2.

     

     

    Resolution

    This problem has been fixed in Intel® Quartus® Prime Pro Edition Software version 21.3.

    Related Products

    This article applies to 4 products

    Intel® Cyclone® 10 GX FPGA
    Intel Agilex® 7 FPGAs and SoC FPGAs
    Intel® Arria® 10 FPGAs and SoC FPGAs
    Intel® Stratix® 10 FPGAs and SoC FPGAs

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