Device Family: Intel® Agilex™, Intel® Arria® 10, Intel® Stratix® 10

Intel Software: Quartus Prime Pro

Type: Answers, Errata

Area: Intellectual Property


Last Modified: July 01, 2020
Version Found: v19.2
Version Fixed: v20.2
Bug ID: 1507949444
IP: Clocked Video Output II (4K Ready)

Why does the Intel® Quartus® synthesis compilation show missing "sdi_cvo_rden" port error when two Clocked Video Output (CVO) II IP core are instantiated in the Intel® Quartus® design ?

Description

Due to the problem in the Intel® Quartus® Prime Pro version 19.2 software and later, the sdi_cvo_rden port is available once "embedded in video" option is checked in Clock Video Output (CVO) II IP core.

The Intel® Quartus® synthesis stage of compilation will  fail with missing "sdi_cvo_rden" port error when two or more CVO II IP are instantiated in the Intel® Quartus® design.

Workaround/Fix

No work around to this problem exists.

This problem has been fixed starting in version 20.2 of the Intel® Quartus® Prime Pro software.