Due to a problem in the Intel® FPGA P-Tile Avalon® Memory-mapped IP for PCI Express* for the Intel® Quartus® Prime Pro Edition software version 20.2, the GUI will show incorrect data bus width and clock frequency.
Device Family: Intel® Agilex™ F-Series, Intel® Stratix® 10 DX
Intel Software: Quartus Prime Pro
Area: Intellectual Property
Last Modified: October 12, 2020
Version Found: v20.2
Bug ID: 14012264636
IP: Avalon-MM Stratix 10 Hard IP for PCI Express